Tuesday, 14 August 2012

Educational Computer Architecture

There is a list of:
ISO Hobbyist Computer Architecture

Also lists of open core computer architectures.

I am evaluating all these for educational purposes.

I had made a comparative lists of VHDL written cpu soft cores but I
have lost it but have chosen a few VHDL open core CPUs for learning
purposes. I even made it into an assignment for students.

1. Simulating Weijun Zhang VHDL CPU
2. Simulating Hamblen's MIPS
3. Simulating CQPIC

All are written using VHDL. However I notice that the industry is
going for Verilog so we may have to equip students with Verilog. I
have not gone deeper into this subject yet.

There are problems with learning about computer architecture using
these open cores. The most important is the lack of detailed
documentation. Ashenden may have written a book but I cannot find its
source code. The book is more about writing VHDL than about computer

For me, language either VHDL or Verilog is a temporary phenomena.
After going through all the computer languages and design tools cycles
and developments, the most important aspect of learning is about the
fundamentals, not the specifics. These tools keep on evolving so we
must keep up but fundamentals never change.

So I now start looking for better educational computer architecture,
or computer organizations. It has to be extremely simple. The simplest
the better. It has to be better documeted, with links to logic design
principles. It can either written in any HDL, but it has to have
schematic diagrams.

Schematic diagrams help a lot in making people understand quickly. The
idea is to let even weak students understand computer
organization(hardware) and therefore computer architecture(ISA).

Learning about instruction set is one way of learning but not
complete. We can only simulate but there is something missing in not
being able to simulate the hardware and the information flows
graphically. There are available instruction set simulators for which
the iso computer architecture lists may include, but I have abandoned
it in favour of soft cores.

We now have free FPGA tools, especially from Altera Quartus II and
Modelsim. We can compile VHDL and Veriflog easily but it is still too
hard for many students. Graphical interface is vital towards

After scanning a few tex books about computer architecture, Stallings,
Mano, Hennessy, Tanenbaum, Hamacher, Murdocca, Cragon, I notice that
among the simplest is the one by Mano and Kime in the book Logic and
Compute Design fundamentals. I use this book for our Logic design
course but have not studied the computer design parts in detail until
a few weeks ago.

Mano described the computer design using state tables and diagrams.
For both single cycle as well as multicycle implementations. It is
complete. It even has zero insertion for immediate data.

I start googling for real implementations of Mano's processor.
The best implementiion for eduational use is this:
ARCHITECTURE , Chad E. Hager, Steven F. Barrett, Cameron H. G. Wright,
archived in http://search.asee.org


The mano machine is documented in the wikipedia:
The description may be wrong because it is not an accumulator based
CPU. It uses 2 operand addresses and 1 destination address.

Accumulator based CPU may be small, like PDP8 and PIC, but it is
difficult to implement, or is it to explain. Whereas as 3-addrss RISC
style, is much easier to explain as X = Y + Z, which is intuitive for

Is there any other open source machines which allow us to explain to
students in the easiest possible way?
Hopefully computer architecture will not viewed as being difficult.
Anyone should be able to understand the fundamentals.

Tanenbaum explains in his textbook about his processeor sthe Mic-1 to
Mic-4, but it appears to be too complex for beginning students.

No comments: